Company Overview Sales Products Contact Us
Online Quotation Site Map Privacy Policy Terms of Use  
 
Manufacturing process
 
Specifications
 
R&D and Publications


 

InPACT is currently in the process of optimizing the crystal growth and processing of 4'' InP materials (cost and quality consistency).

 
 

 

List of publications by InPACT's scientists related to bulk crystal, surface and epitaxy/device issues:

BULK

1) Modelling of Dislocation Generation in lnP crystal growth
S. Gondet, T. Duffar, G. Jacob, N. Van Den Bogaert, F. Louchet, 1999 IPRM, Davos, Switzerland.
2) Improvement of crystalline quality of 3" diameter lnP wafers for micro electronics applications
S. Gondet, T. Duffar, G. Jacob, N. Van Den Bogaert, F. Louchet, 1998 IPRM, Tsukuba, Japan.
3) Thermal stress simulation and interface destabilization in lnP grown by LEC process
S. Gondet, T. Duffar, G. Jacob, N. Van Den Bogaert, F. Louchet, 1998 Int. Conf. on Crystal Growth, Jerusalem, Israel.

 
 



SURFACE

1) Improvement of the surface quality of polished lnP wafers using TOF-SIMS as characterization
N. Thomas, G. Jacob and H. Hardtegen, 1998 IPRM, Tsufaiba, Japan.
2) Improvement of the surface quality of polished lnP wafers
G. Jacob, Ph. Regreny, N. Thomas and H. Hardtegen, 1997 IPRM, Cape Cod, USA.

 
 



EPITAXY / DEVICE

1) Comparative studies of the epi-readiness of 4" InP substrates for MBE growth
W.K. Liu, D. Lubyshev, J.M. Fastenau, Y. Wu, C. Doss, 2004 NAMBE, Banff, Canada.
2) Quaternary InP-based layers grown in the 12x4" multiwafer planetery
T. Schmitt, M. Deufel, K. Christiansen, J. Hofeldt, D. Marsan, 2004 IPRM, Kagoshima, Japan.
3) High fT 0.05µm In0.52 AlAs/In 0.53 GaAs HEMT's with strained 5nm InAs sub-channel on InP substrate
Dae-Hyun Kim, Hun-Hee Noh, Kang-Min Lee, Jae-Hak Lee, Wei Feng, Xiaogang Xie, Quangang Du, Jian Jiang, Kwang-Seok Seo, 2004 IPRM, Kagoshima, Japan.
4) InP/GaAsSb type II DHBTs with fT> 350GHz
B.F. Chu-Kung, M. Feng, Electronics letters, Sept 2004, Vol 40 No 20.
5) Wafer set GaAsSb/InP transistor speed record
Q. Hartmann, D. Marsan, 2005.
6) A GaAsSb/InP HBT circuit technology
J. Godin, M. Riet, P. Berdaguer, M. Kahn, P. Bove, H. Lahreche, J.-P. Pelouard, M. Lijadi, 2005.